RISC-V Baseline

AndesCore V5 32-Bit

32-bit dual-issue 8-stage CPU, MMU, multicore

N45

32-bit dual-issue 8-stage CPU

D45

32-bit dual-issue 8-stage CPU, DSP

32-bit dual-issue 8-stage CPU, MMU, multicore

A45

32-bit dual-issue 8-stage CPU, MMU

32-bit 5-stage CPU, MMU, L2 cache

A27

32-bit 5-stage CPU, MMU

32-bit 5-stage CPU, MMU, multicore

A25

32-bit 5-stage CPU, MMU

32-bit 5-stage CPU, DSP, FPU

32-bit 5-stage CPU, FPU

D23

32-bit 3-stage CPU, DSP

32-bit 3-stage CPU

N22

32-bit 2-stage CPU

AndesCore V5 64-Bit

64-bit O-o-O 4-wide 13-stage CPU, MMU, Multi-cluster, Hypervisor

64-bit O-o-O 4-wide 13-stage CPU, MMU

64-bit dual-issue 8-stage CPU , MMU, multicore

64-bit dual-issue 8-stage CPU

64-bit dual-issue 8-stage CPU, MMU

64-bit dual-issue 8-stage CPU , MMU, multicore

64-bit 5-stage CPU, MMU

64-bit 5-stage CPU, MMU, L2 cache

64-bit 5-stage CPU, MMU

64-bit 5-stage CPU, FPU

64-bit 5-stage CPU, MMU, multicore